1 idt74fct162374at/ct/et fast cmos 16-bit register (3-state) industrial temperature range september 2009 idt74fct162374at/ct/et industrial temperature range fast cmos 16-bit register (3-state) description: the fct162374t 16-bit edge-triggered d-type registers are built using advanced dual metal cmos technology. these high-speed, low-power registers are ideal for use as buffer registers for data synchronization and storage. the output enable (x oe ) and clock (xclk) controls are organized to operate each device as two 8-bit registers or one 16-bit register with common clock. flow-through organization of signal pins simplifies layout. all inputs are designed with hysteresis for improved noise margin. the fct162374t has balanced output drive with current limiting resistors. this offers low ground bounce, minimal undershoot, and controlled output fall times?reducing the need for external series terminating resistors.the fct162374t are plug-in replacements for the fct16374t and abt16374 for on-board bus interface applications. 2 o 1 2 oe 2 clk 2 d 1 to seven other channels c d 1 oe 1 clk 1 o 1 1 d 1 to seven other channels c d the idt logo is a registered trademark of integrated device technology, inc. ? 2009 integrated device technology, inc. dsc-5453/7 features: ? 0.5 micron cmos technology ? high-speed, low-power cmos replacement for abt functions ? typical t sk(o) (output skew) < 250ps ? low input and output leakage 1a (max.) ?v cc = 5v 10% ? balanced output drivers: 24ma ? reduced system switching noise ? typical volp (output ground bounce) < 0.6v at v cc = 5v, t a = 25c ? available in ssop and tssop packages functional block diagram
2 industrial temperature range idt74fct162374at/ct/et fast cmos 16-bit register (3-state) ssop/ tssop top view pin configuration 1 o 1 gnd 1 o 3 v cc 1 oe gnd 2 o 2 gnd v cc gnd 1 o 2 1 o 4 1 o 5 1 o 6 1 o 7 1 o 8 2 o 1 2 o 3 2 o 4 2 o 5 2 o 7 2 o 8 2 o 6 2 oe 1 clk 1 d 1 1 d 2 gnd 1 d 3 1 d 4 v cc 1 d 5 1 d 6 1 d 7 1 d 8 2 d 1 2 d 2 2 d 3 2 d 4 v cc 2 d 5 2 d 7 2 d 8 2 d 6 2 clk gnd gnd gnd 39 29 30 31 32 33 34 35 36 37 38 25 26 27 28 48 47 41 42 43 44 45 46 40 1 2 3 4 5 6 7 8 9 10 12 13 14 15 16 17 18 19 20 11 21 22 23 24 symbol description max unit v term (2) terminal voltage with respect to gnd ?0.5 to 7 v v term (3) terminal voltage with respect to gnd ?0.5 to v cc +0.5 v t stg storage temperature ?65 to +150 c i out dc output current ?60 to 120 ma absolute maximum ratings (1) (1) (1) (1) (1) notes: 1. stresses greater than those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect reliability. 2. all device terminals except fct162xxx output and i/o terminals. 3. output and i/o terminals terminals for fct162xxx. symbol parameter (1) conditions typ. max. unit c in input capacitance v in = 0v 3.5 6 pf c out output capacitance v out = 0v 3.5 8 pf capacitance (t a = +25c, f = 1.0mhz) note: 1. this parameter is measured at characterization but not tested. pin names description x d x data inputs xclk clock inputs x o x 3-state outputs x oe 3-state outputs enable input (active low) pin description note: 1. h = high voltage level l = low voltage level x = don?t care z = high-impedance = low-to-high transition inputs outputs function xdx xclk x oe xox hi-z x l h z xhhz load l ll register h lh l hz h hz function table (1)
3 idt74fct162374at/ct/et fast cmos 16-bit register (3-state) industrial temperature range symbol parameter test conditions (1) min. typ. (2) max. unit v ih input high level guaranteed logic high level 2 ? ? v v il input low level guaranteed logic low level ? ? 0.8 v i ih input high current (input pins) (5) v cc = max. v i = v cc ?? 1a input high current (i/o pins) (5) ?? 1 i il input low current (input pins) (5) v i = gnd ? ? 1a input low current (i/o pins) (5) ?? 1 i ozh high impedance output current v cc = max. v o = 2.7v ? ? 1a i ozl (3-state output pins) (5) v o = 0.5v ? ? 1 v ik clamp diode voltage v cc = min., i in = ?18ma ? ?0.7 ?1.2 v i os short circuit current v cc = max., v o = gnd (3) ?80 ?140 ?250 ma v h input hysteresis ? ? 100 ? mv i ccl quiescent power supply current v cc = max. ? 5 500 a i cch v in = gnd or v cc i ccz dc electrical characteristics over operating range following conditions apply unless otherwise specified: industrial: t a = ?40c to +85c, v cc = 5.0v 10% symbol pa rameter test conditions (1) min typ. (2) max. unit i odl output low current v cc = 5v , v in = v ih or v il, v o = 1.5v (3) 60 115 200 ma i odh output high current v cc = 5v , v in = v ih or v il, v o = 1.5v (3) ?60 ?115 ?200 ma v oh output high voltage v cc = min i oh = ?24ma 2.4 3.3 ? v v in = v ih or v il v ol output low voltage v cc = min i ol = 24ma ? 0.3 0.55 v v in = v ih or v il output drive characteristics notes: 1. for conditions shown as min. or max., use appropriate value specified under electrical characteristics for the applicable dev ice type. 2. typical values are at v cc = 5.0v, +25c ambient. 3. not more than one output should be tested at one time. duration of the test should not exceed one second. 4. duration of the condition can not exceed one second. 5. the test limit for this parameter is 5a at t a = ?55c.
4 industrial temperature range idt74fct162374at/ct/et fast cmos 16-bit register (3-state) symbol parameter test conditions (1) min. typ. (2) max. unit i cc quiescent power supply current v cc = max. ? 0.5 1.5 ma ttl inputs high v in = 3.4v (3) i ccd dynamic power supply v cc = max. v in = v cc ? 60 100 a / current (4) outputs open v in = gnd mhz x oe = gnd one input togging 50% duty cycle i c total power supply current (6) v cc = max. v in = v cc ? 0.6 1.5 ma outputs open v in = gnd f cp = 10mhz 50% duty cycle v in = 3.4v ? 1.1 3 x oe = gnd v in = gnd fi = 5mhz 50% duty cycle one bit toggling v cc = max. v in = v cc ? 3 5.5 (5) outputs open v in = gnd f cp = 10mhz 50% duty cycle x oe = gnd v in = 3.4v ? 7.5 19 (5) sixteen bitstogging v in = gnd fi = 2.5mhz 50% duty cycle power supply characteristics notes: 1. for conditions shown as min. or max., use appropriate value specified under electrical characteristics for the applicable dev ice type. 2. typical values are at v cc = 5.0v, +25c ambient. 3. per ttl driven input (v in = 3.4v). all other inputs at v cc or gnd. 4. this parameter is not directly testable, but is derived for use in total power supply calculations. 5. values for these conditions are examples of the i cc formula. these limits are guaranteed but not tested. 6. i c = i quiescent + i inputs + i dynamic i c = i cc + i cc d h n t + i ccd (f cp n cp /2 + fini) i cc = quiescent current (i ccl , i cch and i ccz ) i cc = power supply current for a ttl high input (v in = 3.4v) d h = duty cycle for ttl inputs high n t = number of ttl inputs at d h i ccd = dynamic current caused by an input transition pair (hlh or lhl) f cp = clock frequency for register devices (zero for non-register devices) n cp = number of clock inputs at f cp fi = input frequency ni = number of inputs at fi
5 idt74fct162374at/ct/et fast cmos 16-bit register (3-state) industrial temperature range 74fct162374at 74fct162374ct 74fct162374et symbol parameter con dition (1) min. (2) max. min. (2) max. min. (2) max. unit t plh propagation delay c l = 50pf 2 6.5 2 5.2 1.5 3.7 ns t phl xclk to xox r l = 500 t pzh output enable time 1.5 6.5 1.5 5.5 1.5 4.4 ns t pzl t phz output disable time 1.5 5.5 1.5 5 1.5 3.6 ns t plz t su set-up time high or low, xdx to xclk 2 ? 2 ? 1.5 ? ns t h hold time high or low, xdx to xclk 1.5 ? 1.5 ? 0 ? ns t w xclk pulse width high or low 5 ? 5 ? 3 (4) ?ns t sk(o) output skew (3) ? 0.5 ? 0.5 ? 0.5 ns switching characteristics over operating range notes: 1. see test circuit and waveforms. 2. minimum limits are guaranteed but not tested on propagation delays. 3. skew between any two outputs of the same package switching in the same direction. this parameter is guaranteed by design. 4. this limit is guaranteed but not tested.
6 industrial temperature range idt74fct162374at/ct/et fast cmos 16-bit register (3-state) pulse generator r t d.u.t. v cc v in c l v out 50pf 500 500 7.0v 3v 1.5v 0v 3v 1.5v 0v 3v 1.5v 0v 3v 1.5v 0v data input timing input asynchronous control preset clear etc. synchronous control t su t h t rem t su t h preset clear clock enable etc. high-low-high pulse low-high-low pulse t w 1.5v 1.5v same phase input transition 3v 1.5v 0v 1.5v v oh t plh output opposite phase input transition 3v 1.5v 0v t plh t phl t phl v ol control input 3v 1.5v 0v 3.5v 0v output normally low output normally high switch closed switch open v ol 0.3v 0.3v t plz t pzl t pzh t phz 3.5v 0v 1.5v 1.5v enable disable v oh test circuits and waveforms propagation delay test circuit for all outputs enable and disable times set-up, hold and release times pulse width test switch open drain disable low closed enable low all other tests open switch position definitions: c l = load capacitance: includes jig and probe capacitance. r t = termination resistance: should be equal to z out of the pulse generator. notes: 1. diagram shown for input control enable-low and input control disable-high. 2. pulse generator for all pulses: rate 1.0mhz; t f 2.5ns; t r 2.5ns.
7 idt74fct162374at/ct/et fast cmos 16-bit register (3-state) industrial temperature range ordering information xx temp. range xxxx device type xx package pvg pag shrink small outline package - green thin shrink small outline packag - green 16-bit register (3-state) 74 40 c to +85 c 162 double-density, 5 volt, balanced drive fct xxx family 374at 374ct 374et corporate headquarters for sales: for tech support: 6024 silver creek valley road 800-345-7015 or 408-284-8200 logichelp@idt.com san jose, ca 95138 fax: 408-284-2775 www.idt.com datasheet document history 09/06/09 pg.6 updated the ordering information by removing the "idt" notation and non rohs part.
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